mmc.c 15 KB

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  1. /*-----------------------------------------------------------------------*/
  2. /* MMCv3/SDv1/SDv2 (in SPI mode) control module (C)ChaN, 2012 */
  3. /*-----------------------------------------------------------------------*/
  4. #include <avr/io.h>
  5. #include "diskio.h"
  6. /* Port controls (Platform dependent) */
  7. #ifdef LEDR_UART /* Disable card access indicator when red LED is used as debug output */
  8. #define LEDR_ON()
  9. #define LEDR_OFF()
  10. #else
  11. #define LEDR_ON() PORTB &= ~_BV(1)
  12. #define LEDR_OFF() PORTB |= _BV(1)
  13. #endif
  14. #define CS_LOW() {PORTB &= ~_BV(2); LEDR_ON();} /* CS=low, LED on */
  15. #define CS_HIGH() {PORTB |= _BV(2); LEDR_OFF();} /* CS=high, LED off */
  16. #define POWER_ON() PORTC &= ~_BV(0) /* MMC power on */
  17. #define POWER_OFF() PORTC |= _BV(0) /* MMC power off */
  18. #define POWER (!(PINC & _BV(0))) /* Test for power state. on:true, off:false */
  19. #define SOCKINS (!(PIND & _BV(7))) /* Test for card exist. yes:true, true:false, default:true */
  20. #define SOCKWP 0 /* Test for write protect. yes:true, no:false, default:false */
  21. #define FCLK_SLOW() SPCR = 0x52 /* Set slow clock (F_CPU / 64) */
  22. #define FCLK_FAST() SPCR = 0x50 /* Set fast clock (F_CPU / 2) */
  23. /*--------------------------------------------------------------------------
  24. Module Private Functions
  25. ---------------------------------------------------------------------------*/
  26. /* Definitions for MMC/SDC command */
  27. #define CMD0 (0) /* GO_IDLE_STATE */
  28. #define CMD1 (1) /* SEND_OP_COND (MMC) */
  29. #define ACMD41 (0x80+41) /* SEND_OP_COND (SDC) */
  30. #define CMD8 (8) /* SEND_IF_COND */
  31. #define CMD9 (9) /* SEND_CSD */
  32. #define CMD10 (10) /* SEND_CID */
  33. #define CMD12 (12) /* STOP_TRANSMISSION */
  34. #define ACMD13 (0x80+13) /* SD_STATUS (SDC) */
  35. #define CMD16 (16) /* SET_BLOCKLEN */
  36. #define CMD17 (17) /* READ_SINGLE_BLOCK */
  37. #define CMD18 (18) /* READ_MULTIPLE_BLOCK */
  38. #define CMD23 (23) /* SET_BLOCK_COUNT (MMC) */
  39. #define ACMD23 (0x80+23) /* SET_WR_BLK_ERASE_COUNT (SDC) */
  40. #define CMD24 (24) /* WRITE_BLOCK */
  41. #define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */
  42. #define CMD55 (55) /* APP_CMD */
  43. #define CMD58 (58) /* READ_OCR */
  44. /* Card type flags (CardType) */
  45. #define CT_MMC 0x01 /* MMC ver 3 */
  46. #define CT_SD1 0x02 /* SD ver 1 */
  47. #define CT_SD2 0x04 /* SD ver 2 */
  48. #define CT_SDC (CT_SD1|CT_SD2) /* SD */
  49. #define CT_BLOCK 0x08 /* Block addressing */
  50. static volatile
  51. DSTATUS Stat = STA_NOINIT; /* Disk status */
  52. static volatile
  53. BYTE Timer1, Timer2; /* 100Hz decrement timer */
  54. static
  55. BYTE CardType; /* Card type flags */
  56. /*-----------------------------------------------------------------------*/
  57. /* Power Control (Platform dependent) */
  58. /*-----------------------------------------------------------------------*/
  59. /* When the target system does not support socket power control, there */
  60. /* is nothing to do in these functions and chk_power always returns 1. */
  61. static
  62. void power_off (void)
  63. {
  64. SPCR = 0; /* Disable SPI function */
  65. DDRD &= 0b01111111; /* Set SCK/MOSI/CS to hi-z, INS# as pull-up */
  66. PORTD |= 0b10000000;
  67. DDRB &= 0b11000011;
  68. PORTB |= 0b11000011;
  69. POWER_OFF();
  70. Stat |= STA_NOINIT;
  71. }
  72. static
  73. void power_on (void) /* Apply power sequence */
  74. {
  75. for (Timer1 = 30; Timer1; ) ; /* 300ms */
  76. POWER_ON(); /* Power on */
  77. for (Timer1 = 3; Timer1; ) ; /* 30ms */
  78. PORTB = (PORTB & 0b11011111) | 0b00001100; /* Configure SCK/MOSI/CS as output */
  79. DDRB = (DDRB & 0b11101111) | 0b00101100;
  80. SPCR = 0x52; /* Enable SPI function in mode 0 */
  81. SPSR = 0x01; /* SPI 2x mode */
  82. }
  83. /*-----------------------------------------------------------------------*/
  84. /* Transmit/Receive data from/to MMC via SPI (Platform dependent) */
  85. /*-----------------------------------------------------------------------*/
  86. /* Exchange a byte */
  87. static
  88. BYTE xchg_spi ( /* Returns received data */
  89. BYTE dat /* Data to be sent */
  90. )
  91. {
  92. SPDR = dat;
  93. loop_until_bit_is_set(SPSR, SPIF);
  94. return SPDR;
  95. }
  96. /* Send a data block */
  97. static
  98. void xmit_spi_multi (
  99. const BYTE *p, /* Data block to be sent */
  100. UINT cnt /* Size of data block */
  101. )
  102. {
  103. do {
  104. SPDR = *p++; loop_until_bit_is_set(SPSR,SPIF);
  105. SPDR = *p++; loop_until_bit_is_set(SPSR,SPIF);
  106. } while (cnt -= 2);
  107. }
  108. /* Receive a data block */
  109. static
  110. void rcvr_spi_multi (
  111. BYTE *p, /* Data buffer */
  112. UINT cnt /* Size of data block */
  113. )
  114. {
  115. do {
  116. SPDR = 0xFF; loop_until_bit_is_set(SPSR,SPIF); *p++ = SPDR;
  117. SPDR = 0xFF; loop_until_bit_is_set(SPSR,SPIF); *p++ = SPDR;
  118. } while (cnt -= 2);
  119. }
  120. /*-----------------------------------------------------------------------*/
  121. /* Wait for card ready */
  122. /*-----------------------------------------------------------------------*/
  123. static
  124. int wait_ready (void) /* 1:OK, 0:Timeout */
  125. {
  126. BYTE d;
  127. Timer2 = 50; /* Wait for ready in timeout of 500ms */
  128. do
  129. d = xchg_spi(0xFF);
  130. while (d != 0xFF && Timer2);
  131. return (d == 0xFF) ? 1 : 0;
  132. }
  133. /*-----------------------------------------------------------------------*/
  134. /* Deselect the card and release SPI bus */
  135. /*-----------------------------------------------------------------------*/
  136. static
  137. void deselect (void)
  138. {
  139. CS_HIGH();
  140. xchg_spi(0xFF); /* Dummy clock (force DO hi-z for multiple slave SPI) */
  141. }
  142. /*-----------------------------------------------------------------------*/
  143. /* Select the card and wait for ready */
  144. /*-----------------------------------------------------------------------*/
  145. static
  146. int select (void) /* 1:Successful, 0:Timeout */
  147. {
  148. CS_LOW();
  149. xchg_spi(0xFF); /* Dummy clock (force DO enabled) */
  150. if (wait_ready()) return 1; /* OK */
  151. deselect();
  152. return 0; /* Timeout */
  153. }
  154. /*-----------------------------------------------------------------------*/
  155. /* Receive a data packet from MMC */
  156. /*-----------------------------------------------------------------------*/
  157. static
  158. int rcvr_datablock (
  159. BYTE *buff, /* Data buffer to store received data */
  160. UINT btr /* Byte count (must be multiple of 4) */
  161. )
  162. {
  163. BYTE token;
  164. Timer1 = 20;
  165. do { /* Wait for data packet in timeout of 200ms */
  166. token = xchg_spi(0xFF);
  167. } while ((token == 0xFF) && Timer1);
  168. if (token != 0xFE) return 0; /* If not valid data token, retutn with error */
  169. rcvr_spi_multi(buff, btr); /* Receive the data block into buffer */
  170. xchg_spi(0xFF); /* Discard CRC */
  171. xchg_spi(0xFF);
  172. return 1; /* Return with success */
  173. }
  174. /*-----------------------------------------------------------------------*/
  175. /* Send a data packet to MMC */
  176. /*-----------------------------------------------------------------------*/
  177. static
  178. int xmit_datablock (
  179. const BYTE *buff, /* 512 byte data block to be transmitted */
  180. BYTE token /* Data/Stop token */
  181. )
  182. {
  183. BYTE resp;
  184. if (!wait_ready()) return 0;
  185. xchg_spi(token); /* Xmit data token */
  186. if (token != 0xFD) { /* Is data token */
  187. xmit_spi_multi(buff, 512); /* Xmit the data block to the MMC */
  188. xchg_spi(0xFF); /* CRC (Dummy) */
  189. xchg_spi(0xFF);
  190. resp = xchg_spi(0xFF); /* Reveive data response */
  191. if ((resp & 0x1F) != 0x05) /* If not accepted, return with error */
  192. return 0;
  193. }
  194. return 1;
  195. }
  196. /*-----------------------------------------------------------------------*/
  197. /* Send a command packet to MMC */
  198. /*-----------------------------------------------------------------------*/
  199. static
  200. BYTE send_cmd ( /* Returns R1 resp (bit7==1:Send failed) */
  201. BYTE cmd, /* Command index */
  202. DWORD arg /* Argument */
  203. )
  204. {
  205. BYTE n, res;
  206. if (cmd & 0x80) { /* ACMD<n> is the command sequense of CMD55-CMD<n> */
  207. cmd &= 0x7F;
  208. res = send_cmd(CMD55, 0);
  209. if (res > 1) return res;
  210. }
  211. /* Select the card and wait for ready */
  212. deselect();
  213. if (!select()) return 0xFF;
  214. /* Send command packet */
  215. xchg_spi(0x40 | cmd); /* Start + Command index */
  216. xchg_spi((BYTE)(arg >> 24)); /* Argument[31..24] */
  217. xchg_spi((BYTE)(arg >> 16)); /* Argument[23..16] */
  218. xchg_spi((BYTE)(arg >> 8)); /* Argument[15..8] */
  219. xchg_spi((BYTE)arg); /* Argument[7..0] */
  220. n = 0x01; /* Dummy CRC + Stop */
  221. if (cmd == CMD0) n = 0x95; /* Valid CRC for CMD0(0) + Stop */
  222. if (cmd == CMD8) n = 0x87; /* Valid CRC for CMD8(0x1AA) Stop */
  223. xchg_spi(n);
  224. /* Receive command response */
  225. if (cmd == CMD12) xchg_spi(0xFF); /* Skip a stuff byte when stop reading */
  226. n = 10; /* Wait for a valid response in timeout of 10 attempts */
  227. do
  228. res = xchg_spi(0xFF);
  229. while ((res & 0x80) && --n);
  230. return res; /* Return with the response value */
  231. }
  232. /*--------------------------------------------------------------------------
  233. Public Functions
  234. ---------------------------------------------------------------------------*/
  235. /*-----------------------------------------------------------------------*/
  236. /* Initialize Disk Drive */
  237. /*-----------------------------------------------------------------------*/
  238. DSTATUS disk_initialize (
  239. BYTE drv /* Physical drive nmuber (0) */
  240. )
  241. {
  242. BYTE n, cmd, ty, ocr[4];
  243. if (drv) return STA_NOINIT; /* Supports only single drive */
  244. power_off(); /* Turn off the socket power to reset the card */
  245. if (Stat & STA_NODISK) return Stat; /* No card in the socket */
  246. power_on(); /* Turn on the socket power */
  247. FCLK_SLOW();
  248. for (n = 10; n; n--) xchg_spi(0xFF); /* 80 dummy clocks */
  249. ty = 0;
  250. if (send_cmd(CMD0, 0) == 1) { /* Enter Idle state */
  251. Timer1 = 100; /* Initialization timeout of 1000 msec */
  252. if (send_cmd(CMD8, 0x1AA) == 1) { /* SDv2? */
  253. for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF); /* Get trailing return value of R7 resp */
  254. if (ocr[2] == 0x01 && ocr[3] == 0xAA) { /* The card can work at vdd range of 2.7-3.6V */
  255. while (Timer1 && send_cmd(ACMD41, 1UL << 30)); /* Wait for leaving idle state (ACMD41 with HCS bit) */
  256. if (Timer1 && send_cmd(CMD58, 0) == 0) { /* Check CCS bit in the OCR */
  257. for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF);
  258. ty = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2; /* SDv2 */
  259. }
  260. }
  261. } else { /* SDv1 or MMCv3 */
  262. if (send_cmd(ACMD41, 0) <= 1) {
  263. ty = CT_SD1; cmd = ACMD41; /* SDv1 */
  264. } else {
  265. ty = CT_MMC; cmd = CMD1; /* MMCv3 */
  266. }
  267. while (Timer1 && send_cmd(cmd, 0)); /* Wait for leaving idle state */
  268. if (!Timer1 || send_cmd(CMD16, 512) != 0) /* Set R/W block length to 512 */
  269. ty = 0;
  270. }
  271. }
  272. CardType = ty;
  273. deselect();
  274. if (ty) { /* Initialization succeded */
  275. Stat &= ~STA_NOINIT; /* Clear STA_NOINIT */
  276. FCLK_FAST();
  277. } else { /* Initialization failed */
  278. power_off();
  279. }
  280. return Stat;
  281. }
  282. /*-----------------------------------------------------------------------*/
  283. /* Get Disk Status */
  284. /*-----------------------------------------------------------------------*/
  285. DSTATUS disk_status (
  286. BYTE drv /* Physical drive nmuber (0) */
  287. )
  288. {
  289. if (drv) return STA_NOINIT | STA_NODISK; /* Supports only single drive */
  290. return Stat;
  291. }
  292. /*-----------------------------------------------------------------------*/
  293. /* Read Sector(s) */
  294. /*-----------------------------------------------------------------------*/
  295. DRESULT disk_read (
  296. BYTE drv, /* Physical drive nmuber (0) */
  297. BYTE *buff, /* Pointer to the data buffer to store read data */
  298. DWORD sector, /* Start sector number (LBA) */
  299. UINT count /* Sector count (1..255) */
  300. )
  301. {
  302. if (drv || !count) return RES_PARERR;
  303. if (Stat & STA_NOINIT) return RES_NOTRDY;
  304. if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert to byte address if needed */
  305. if (count == 1) { /* Single block read */
  306. if ((send_cmd(CMD17, sector) == 0) /* READ_SINGLE_BLOCK */
  307. && rcvr_datablock(buff, 512))
  308. count = 0;
  309. }
  310. else { /* Multiple block read */
  311. if (send_cmd(CMD18, sector) == 0) { /* READ_MULTIPLE_BLOCK */
  312. do {
  313. if (!rcvr_datablock(buff, 512)) break;
  314. buff += 512;
  315. } while (--count);
  316. send_cmd(CMD12, 0); /* STOP_TRANSMISSION */
  317. }
  318. }
  319. deselect();
  320. return count ? RES_ERROR : RES_OK;
  321. }
  322. /*-----------------------------------------------------------------------*/
  323. /* Write Sector(s) */
  324. /*-----------------------------------------------------------------------*/
  325. DRESULT disk_write (
  326. BYTE drv, /* Physical drive nmuber (0) */
  327. const BYTE *buff, /* Pointer to the data to be written */
  328. DWORD sector, /* Start sector number (LBA) */
  329. UINT count /* Sector count (1..255) */
  330. )
  331. {
  332. if (drv || !count) return RES_PARERR;
  333. if (Stat & STA_NOINIT) return RES_NOTRDY;
  334. if (Stat & STA_PROTECT) return RES_WRPRT;
  335. if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert to byte address if needed */
  336. if (count == 1) { /* Single block write */
  337. if ((send_cmd(CMD24, sector) == 0) /* WRITE_BLOCK */
  338. && xmit_datablock(buff, 0xFE))
  339. count = 0;
  340. }
  341. else { /* Multiple block write */
  342. if (CardType & CT_SDC) send_cmd(ACMD23, count);
  343. if (send_cmd(CMD25, sector) == 0) { /* WRITE_MULTIPLE_BLOCK */
  344. do {
  345. if (!xmit_datablock(buff, 0xFC)) break;
  346. buff += 512;
  347. } while (--count);
  348. if (!xmit_datablock(0, 0xFD)) /* STOP_TRAN token */
  349. count = 1;
  350. }
  351. }
  352. deselect();
  353. return count ? RES_ERROR : RES_OK;
  354. }
  355. /*-----------------------------------------------------------------------*/
  356. /* Miscellaneous Functions */
  357. /*-----------------------------------------------------------------------*/
  358. DRESULT disk_ioctl (
  359. BYTE drv, /* Physical drive nmuber (0) */
  360. BYTE ctrl, /* Control code */
  361. void *buff /* Buffer to send/receive control data */
  362. )
  363. {
  364. DRESULT res;
  365. if (drv) return RES_PARERR;
  366. buff = 0;
  367. if (ctrl == CTRL_POWER_OFF) {
  368. power_off();
  369. return RES_OK;
  370. }
  371. if (Stat & STA_NOINIT) return RES_NOTRDY;
  372. res = RES_ERROR;
  373. switch (ctrl) {
  374. case CTRL_SYNC :
  375. if (select()) {
  376. deselect();
  377. res = RES_OK;
  378. }
  379. break;
  380. default:
  381. res = RES_PARERR;
  382. }
  383. deselect();
  384. return res;
  385. }
  386. /*-----------------------------------------------------------------------*/
  387. /* Device Timer Interrupt Procedure */
  388. /*-----------------------------------------------------------------------*/
  389. /* This function must be called in period of 10ms */
  390. void disk_timerproc (void)
  391. {
  392. BYTE n, s;
  393. n = Timer1; /* 100Hz decrement timer */
  394. if (n) Timer1 = --n;
  395. n = Timer2;
  396. if (n) Timer2 = --n;
  397. s = Stat;
  398. if (SOCKWP) /* Write protected */
  399. s |= STA_PROTECT;
  400. else /* Write enabled */
  401. s &= ~STA_PROTECT;
  402. if (SOCKINS) /* Card inserted */
  403. s &= ~STA_NODISK;
  404. else /* Socket empty */
  405. s |= (STA_NODISK | STA_NOINIT);
  406. Stat = s; /* Update MMC status */
  407. }